E8(P ',Qualcomm Technologies, Inc. SM8650 MTP2qcom,sm8650-mtpqcom,sm8650chosen=serial0:115200n8clocksxo-board 2fixed-clockIVfsleep-clk 2fixed-clockIV}f(bi-tcxo-div2-clk2fixed-factor-clockInuf&bi-tcxo-ao-div2-clk2fixed-factor-clockInuf'pcie-1-phy-aux-clk 2fixed-clockIVf+cpus cpu@0cpu2arm,cortex-a520npscipscidfl2-cache2cache'3fl3-cache2cache'3fcpu@100cpu2arm,cortex-a520npscipscidfcpu@200cpu2arm,cortex-a720npscipsci fl2-cache2cache'3f cpu@300cpu2arm,cortex-a720n pscipsci fcpu@400cpu2arm,cortex-a720n pscipsci fl2-cache2cache'3f cpu@500cpu2arm,cortex-a720n pscipscifl2-cache2cache'3fcpu@600cpu2arm,cortex-a720npscipscifl2-cache2cache'3fcpu@700cpu2arm,cortex-x4npscipscifLfl2-cache2cache'3fcpu-mapcluster0core0Acore1Acore2Acore3Acore4Acore5Acore6Acore7Aidle-statesEpscicpu-sleep-0-02arm,idle-stateRsilver-rail-power-collapseb@y&,fcpu-sleep-1-02arm,idle-stateRgold-rail-power-collapseb@yXf cpu-sleep-2-02arm,idle-stateRgold-plus-rail-power-collapseb@yF8f!domain-idle-statescluster-sleep-02domain-idle-statebADy .#f"cluster-sleep-12domain-idle-statebADy 0'f#firmwarescm2qcom,scm-sm8650qcom,scminterconnect-02qcom,sm8650-clk-virtf0interconnect-12qcom,sm8650-mc-virtfmemory@a0000000memorypmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0 fpower-domain-cpu1 fpower-domain-cpu2 fpower-domain-cpu3 f power-domain-cpu4 f power-domain-cpu5 f power-domain-cpu6 fpower-domain-cpu7 !fpower-domain-cluster "#freserved-memory  hyp@80000000'cpusys-vm@80e00000@'xbl-dt-log-merged@81a00000&'aop-cmd-db@81c60000 2qcom,cmd-db'aop-tme-uefi-merged@81c80000P'smem@81d00000 2qcom,smem .$'adsp-mhi@81f00000'pvmfw@824a0000J'global-sync@82600000`'ftz-stat@82700000p'qdss@82800000'qlink-logging@84800000 'fmpss-dsm@86b00000'fmpss-dsm-2@8b400000@'fmpss@8bc00000@'fq6-mpss-dtb@9b000000'fipa-fw@9b080000'ipa-gsi@9b090000 'gpu-micro-code@9b09a000 'fspss@9b0a0000 'spu-tz-shared@9b280000('spu-modem-shared@9b2e0000.'camera@9b3000000'video@9bb00000'cvp@9c3000000p'cdsp@9ca00000@'fq6-cdsp-dtb@9de00000'fq6-adsp-dtb@9de80000'fadspslpi@9df00000'frmtfs@d7c000002qcom,rmtfs-mem@'6Etz-merged@d8000000'hwfence-shbuf@e6440000D-'trust-ui-vm@f3800000@'oem-vm@f7c00000'llcc-lpi@ff800000`'smp2p-adsp 2qcom,smp2pO% c%jtmaster-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-cdsp 2qcom,smp2pO% c%j^tmaster-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-modem 2qcom,smp2pO% c%jtmaster-kernelmaster-kernelfslave-kernel slave-kernelfipa-ap-to-modemipafipa-modem-to-apipafsoc@0 2simple-bus  clock-controller@1000002qcom,sm8650-gccB8n&'()*+,,,-If/mailbox@4060002qcom,sm8650-ipccqcom,ipcc@` f%dma-controller@800000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dmaLMNOPQRSTUVW ?" -.64 Adisabledf3geniqup@8c00002qcom,geni-se-qup n// Hm-ahbs-ahb -.#4  Aokayi2c@8800002qcom,geni-i2c@ un/vHseH0012Tqup-corequp-configqup-memory g33ltxrxv4default  Adisabledspi@8800002qcom,geni-spi@ un/vHseH0012Tqup-corequp-configqup-memory g33ltxrxv56default  Adisabledi2c@8840002qcom,geni-i2c@@ Gn/xHseH0012Tqup-corequp-configqup-memory g33ltxrxv7default  Adisabledspi@8840002qcom,geni-spi@@ Gn/xHseH0012Tqup-corequp-configqup-memory g33ltxrxv89default  Adisabledi2c@8880002qcom,geni-i2c@ Hn/zHseH0012Tqup-corequp-configqup-memory g33ltxrxv:default  Adisabledspi@8880002qcom,geni-spi@ Hn/zHseH0012Tqup-corequp-configqup-memory g33ltxrxv;<default  Adisabledi2c@88c0002qcom,geni-i2c@ In/|HseH0012Tqup-corequp-configqup-memory g33ltxrxv=default  Adisabledspi@88c0002qcom,geni-spi@ In/|HseH0012Tqup-corequp-configqup-memory g33ltxrxv>?default  Adisabledi2c@8900002qcom,geni-i2c@ Jn/~HseH0012Tqup-corequp-configqup-memory g33ltxrxv@default  Adisabledspi@8900002qcom,geni-spi@ Jn/~HseH0012Tqup-corequp-configqup-memory g33ltxrxvABdefault  Adisabledi2c@8940002qcom,geni-i2c@@ Kn/HseH0012Tqup-corequp-configqup-memory g33ltxrxvCdefault  Adisabledspi@8940002qcom,geni-spi@@ Kn/HseH0012Tqup-corequp-configqup-memory g33ltxrxvDEdefault  Adisabledserial@8980002qcom,geni-uart@ n/Hse00012Tqup-corequp-configvFGdefault Adisabledserial@89c0002qcom,geni-debug-uart@ n/Hse00012Tqup-corequp-configvHdefaultAokaygeniqup@9c00002qcom,geni-se-i2c-master-hub n/\Hs-ahb   Adisabledi2c@9800002qcom,geni-i2c-master-hub@ n/H/GHsecore00012Tqup-corequp-configvIdefault  Adisabledi2c@9840002qcom,geni-i2c-master-hub@@ n/J/GHsecore00012Tqup-corequp-configvJdefault  Adisabledi2c@9880002qcom,geni-i2c-master-hub@ n/L/GHsecore00012Tqup-corequp-configvKdefault  Adisabledi2c@98c0002qcom,geni-i2c-master-hub@ n/N/GHsecore00012Tqup-corequp-configvLdefault  Adisabledi2c@9900002qcom,geni-i2c-master-hub@ n/P/GHsecore00012Tqup-corequp-configvMdefault  Adisabledi2c@9940002qcom,geni-i2c-master-hub@@ n/R/GHsecore00012Tqup-corequp-configvNdefault  Adisabledi2c@9980002qcom,geni-i2c-master-hub@ n/T/GHsecore00012Tqup-corequp-configvOdefault  Adisabledi2c@99c0002qcom,geni-i2c-master-hub@ n/V/GHsecore00012Tqup-corequp-configvPdefault  Adisabledi2c@9a00002qcom,geni-i2c-master-hub@ n/X/GHsecore00012Tqup-corequp-configvQdefault  Adisabledi2c@9a40002qcom,geni-i2c-master-hub@@ n/Z/GHsecore00012Tqup-corequp-configvRdefault  Adisableddma-controller@a00000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dma%&'()*  " -.4 AdisabledfTgeniqup@ac00002qcom,geni-se-qup n// Hm-ahbs-ahb00 Tqup-core -.4   Adisabledi2c@a800002qcom,geni-i2c@ an/aHseH0012STqup-corequp-configqup-memory gTTltxrxvUdefault  Adisabledspi@a800002qcom,geni-spi@ an/aHseH0012STqup-corequp-configqup-memory gTTltxrxvVWdefault  Adisabledi2c@a840002qcom,geni-i2c@@ bn/cHseH0012STqup-corequp-configqup-memory gTTltxrxvXdefault  Adisabledspi@a840002qcom,geni-spi@@ bn/cHseH0012STqup-corequp-configqup-memory gTTltxrxvYZdefault  Adisabledi2c@a880002qcom,geni-i2c@ cn/eHseH0012STqup-corequp-configqup-memory gTTltxrxv[default  Adisabledspi@a880002qcom,geni-spi@ cn/eHseH0012STqup-corequp-configqup-memory gTTltxrxv\]default  Adisabledi2c@a8c0002qcom,geni-i2c@ dn/gHseH0012STqup-corequp-configqup-memory gTTltxrxv^default  Adisabledspi@a8c0002qcom,geni-spi@ dn/gHseH0012STqup-corequp-configqup-memory gTTltxrxv_`default  Adisabledi2c@a900002qcom,geni-i2c@ en/iHseH0012STqup-corequp-configqup-memory gTTltxrxvadefault  Adisabledspi@a900002qcom,geni-spi@ en/iHseH0012STqup-corequp-configqup-memory gTTltxrxvbcdefault  Adisabledi2c@a940002qcom,geni-i2c@@ fn/kHseH0012STqup-corequp-configqup-memory gTTltxrxvddefault  Adisabledspi@a940002qcom,geni-spi@@ fn/kHseH0012STqup-corequp-configqup-memory gTTltxrxvefdefault  Adisabledi2c@a980002qcom,geni-i2c@ kn/mHseH0012STqup-corequp-configqup-memory gTTltxrxvgdefault  Adisabledspi@a980002qcom,geni-spi@ kn/mHseH0012STqup-corequp-configqup-memory gTTltxrxvhidefault  Adisabledi2c@a9c0002qcom,geni-i2c@ Cn/oHseH0012STqup-corequp-configqup-memory gTTltxrxvjdefault  Adisabledspi@a9c0002qcom,geni-spi@ Cn/oHseH0012STqup-corequp-configqup-memory gTTltxrxvkldefault  Adisabledinterconnect@15000002qcom,sm8650-cnoc-mainP@fninterconnect@16000002qcom,sm8650-config-noc`bf2interconnect@16800002qcom,sm8650-system-nochЀinterconnect@16c00002qcom,sm8650-pcie-anocl"n// fminterconnect@16e00002qcom,sm8650-aggre1-nocndn//fSinterconnect@17000002qcom,sm8650-aggre2-nocpn finterconnect@17800002qcom,sm8650-mmss-nocxfrng@10c30002qcom,sm8650-trngqcom,trng 0pci@1c00000pci"2qcom,pcie-sm8650qcom,pcie-sm8550P0`` ``parfdbielbiatuconfig`(msi0msi1msi2msi3msi4msi5msi6msi7@n/$/&/'/,/-/ // IHauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi/pci0m1n Tpcie-memcpu-pcie/ .. oo  )%pciephy 8 ` `0`04Aokay /p` :p^vqdefaultpcie@0pci  phy@1c06000 2qcom,sm8650-qmp-gen3x2-pcie-phy` (n/$/&r/(/*Hauxcfg_ahbrefrchngpipeF/(V/phy/Ikpcie0_pipe_clk~Aokaystf)pci@1c08000pci"2qcom,pcie-sm8650qcom,pcie-sm8550P0@@ @@parfdbielbiatuconfig`34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7@n/./0/1/8/9/ // IHauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiF/.V$// pcilink_down0m1n Tpcie-memcpu-pcie/ .. oo  *%pciephy4 8 @ @0@0Aokay /pc :pavudefaultpcie@0pci  phy@1c0e000 2qcom,sm8650-qmp-gen4x2-pcie-phy (n/2/0r/4/6Hauxcfg_ahbrefrchngpipeF/4V/ / phyphy_nocsr/Ikpcie1_pipe_clk~Aokayvtsf*dma-controller@1dc40002qcom,bam-v1.7.0@ "-..fwcrypto@1dfa000)2qcom,sm8650-qceqcom,sm8150-qceqcom,qceߠ`Tmemorygwwlrxtx-..phy@1d800002qcom,sm8650-qmp-ufs-phy n/rHrefref_auxqrefxufsphy/I~Aokayytf,ufs@1d84000+2qcom,sm8650-ufshcqcom,ufshcjedec,ufs-2.0@0  @n////r///nHcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@JJJ/rst0S12%Tufs-ddrcpu-ufs/z -.` { ,%ufsphyAokay p |+ <}HOfxcrypto@1d88000;2qcom,sm8650-inline-crypto-engineqcom,inline-crypto-engine؀n/f{hwlock@1f400002qcom,tcsr-mutexZf$clock-controller@1fc00002qcom,sm8650-tcsrsyscon nIfrgpu@3d00000!2qcom,adreno-43051401qcom,adreno0 #kgsl_3d0_reg_memorycx_memcx_dbgc ,-~~h| Adisabledzap-shaderopp-table2operating-points-v2fopp-231000000 4opp-310000000z98opp-366000000з<opp-422000000'5@opp-500000000ePopp-578000000"sopp-629000000%}@opp-680000000(opp-720000000*Topp-770000000-Dopp-8340000001Ԁ@gmu@3d6a000&2qcom,adreno-gmu-750.1qcom,adreno-gmu0֠P (gmursccgmu_pdc01hfigmu8n/ /"!Hahbgmucxoaximemnochubdemetcxgx -~hfopp-table2operating-points-v2fopp-260000000I@opp-625000000%@@clock-controller@3d900002qcom,sm8650-gpuccn&/ /!Ifiommu@3da0000@2qcom,sm8650-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-5008>?@A n/"/#Hhlosbusifaceahb4f~ipa@3f40000 2qcom,sm8650-ipaqcom,sm8550-ipa-..0P@ipa-regipa-sharedgsi8O(ipagsiipa-clock-queryipa-setup-readyn Hcore012Tmemoryconfig*ipa-clock-enabled-validipa-clock-enabled Adisabledremoteproc@40800002qcom,sm8650-mpss-pas@@LO0wdogfatalreadyhandoverstop-ackshutdown-acknHxo cxmssstopAokay0qcom/sm8650/modem.mbnqcom/sm8650/modem_dtb.mbnglink-edgeO% c%mpsscodec@6aa000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nDfgHmclkmacrodcodecfsgenI kwsa2-mclkfsoundwire@6ab00002qcom,soundwire-v2.0.0 nHifaceWSA2vdefault( 8?? M  ` s       Adisabledcodec@6ac000062qcom,sm8650-lpass-rx-macroqcom,sm8550-lpass-rx-macro(n@fgHmclkmacrodcodecfsgenIkmclkfsoundwire@6ad00002qcom,soundwire-v2.0.0 nHifaceRXvdefault( 81 M  `  s       Adisabledcodec@6ae000062qcom,sm8650-lpass-tx-macroqcom,sm8550-lpass-tx-macro(n9fgHmclkmacrodcodecfsgenIkmclkfcodec@6b0000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nBfgHmclkmacrodcodecfsgenIkmclkfsoundwire@6b100002qcom,soundwire-v2.0.0 nHifaceWSAvdefault( 8?? M  ` s      Aokayfspeaker@0,02sdw20217020400vdefault   SpkrLeft.fspeaker@0,12sdw20217020400vdefault pM  SpkrRight.fsoundwire@6d300002qcom,soundwire-v2.0.0 corewakeupnHifaceTXvdefault(<M`s  Adisabledcodec@6d4400062qcom,sm8650-lpass-va-macroqcom,sm8550-lpass-va-macro@$n9fgHmclkmacrodcodecIkfsgenfpinctrl@6e800002qcom,sm8650-lpass-lpi-pinctrlnfg HcoreaudioUeqftx-swr-active-statefclk-pins}gpio0 swr_tx_clkdata-pins}gpio1gpio2gpio14 swr_tx_datarx-swr-active-statefclk-pins}gpio3 swr_rx_clkdata-pins }gpio4gpio5 swr_rx_datadmic01-default-stateclk-pins}gpio6 dmic1_clkdata-pins}gpio7 dmic1_datadmic23-default-stateclk-pins}gpio8 dmic2_clkdata-pins}gpio9 dmic2_datawsa-swr-active-statefclk-pins}gpio10 wsa_swr_clkdata-pins}gpio11 wsa_swr_datawsa2-swr-active-statefclk-pins}gpio15 wsa2_swr_clkdata-pins}gpio16wsa2_swr_dataspkr-1-sd-n-active-state}gpio21gpiofinterconnect@74000002qcom,sm8650-lpass-lpiaon-noc@interconnect@74300002qcom,sm8650-lpass-lpicx-nocCfinterconnect@7e400002qcom,sm8650-lpass-ag-nocmmc@8804000$2qcom,sm8650-sdhciqcom,sdhci-msm-v5@hc_irqpwr_irqn//Hifacecorexo012 Tsdhc-ddrcpu-sdhch -.@d, h4Aokay  &2?GvNdefaultsleepopp-table2operating-points-v2fopp-19200000$opp-50000000opp-100000000opp-202000000 Fdisplay-subsystem@ae000002qcom,sm8650-mdss mdss Sn/=01Tmdp0-memmdp1-mem -.  Aokayfdisplay-controller@ae010002qcom,sm8650-dpu   mdpvbifO(n/@=IHnrt_busifacelutcorevsyncFIV$hports port@0endpointXfport@1endpointXfport@2endpointXfopp-table2operating-points-v2fopp-200000000 opp-325000000_@opp-375000000Z opp-514000000zdsi@ae94000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl @ dsi_ctrlO0nB8/$Hbytebyte_intfpixelcoreifacebusFChh %dsi Aokaytports port@0endpointXfport@1endpointXfopp-table2operating-points-v2fopp-187500000 -opp-300000000opp-358000000Vpanel@02visionox,vtdr6130 pvNdefaultsleepportendpointXfphy@ae950002qcom,sm8650-dsi-phy-4nm0 P R Udsi_phydsi_phy_lanedsi_plln HifacerefI~Aokaysfdsi@ae96000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl ` dsi_ctrlO0n D:/$Hbytebyte_intfpixelcoreifacebusF Ehh %dsi  Adisabledports port@0endpointXfport@1endpointphy@ae970002qcom,sm8650-dsi-phy-4nm0 p r udsi_phydsi_phy_lanedsi_plln HifacerefI~ Adisabledfdisplayport-controller@af540002qcom,sm8650-dpP @ B Pp ` pO (n ;Hcore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelFh--h -%dp Adisabledopp-table2operating-points-v2fopp-162000000 opp-270000000߀opp-540000000 /opp-8100000000Gzports port@0endpointXfport@1endpointclock-controller@af000002qcom,sm8650-dispcc \n&'/(--IAokayfphy@88e300062qcom,sm8650-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy0TnrHref/~Aokayst fphy@88e80002qcom,sm8650-qmp-usb3-dp-phy0 n///Hauxrefcom_auxusb3_pipe// phycommon/I~Aokaytf-ports port@0endpointport@1endpointport@2endpointusb@a6f88002qcom,sm8650-dwc3qcom,dwc3 oDO<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq0n/ ////r&Hcfg_noccoreifacesleepmock_utmixoF//V$ //z  Aokayusb@a600000 2snps,dwc3 `  -.@  -%usb2-phyusb3-phy   5 M e }   4 otg ports port@0endpointXfport@1endpointXfinterrupt-controller@b2200002qcom,sm8650-pdcqcom,pdc "@dH ^^a}?~ fthermal-sensor@c228000 2qcom,sm8650-tsensqcom,tsens-v2 " " uplowcritical  fthermal-sensor@c229000 2qcom,sm8650-tsensqcom,tsens-v2 " "0uplowcritical  fthermal-sensor@c22a000 2qcom,sm8650-tsensqcom,tsens-v2 " "@uplowcritical  fpower-management@c300000#2qcom,sm8650-aoss-qmpqcom,aoss-qmp 0%O% c%Ifsram@c3f00002qcom,rpmh-stats ?spmi@c4000002qcom,spmi-pmic-arbP @0 P@ D L B@corechnlsobsrvrintrcnfg O periph_irq  & pmic@c2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ fpmic@d2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ fpmic@12qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpioUq efsdc2-card-det-state}gpio12normal 2 ? Nfled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led Adisabledpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm [ Adisabledpmic@72qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpioUq efphy@fd002qcom,pm8550b-eusb2-repeater~ f sfpmic@82qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpioUqefpmic@22qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpioUqefpmic@32qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpioUqefpmic@42qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpioUqefpmic@62qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpioUqefpmic@02qcom,pm8550qcom,spmi-pmic pon@13002qcom,pmk8350-pon hlospbspwrkey2qcom,pmk8350-pwrkey t Adisabledresin2qcom,pmk8350-resin Adisabledrtc@61002qcom,pmk8350-rtcab rtcalarmbnvram@71002qcom,spmi-sdamq   qreboot-reason@48H fgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpioUqefpmic@a2qcom,pmr735dqcom,spmi-pmic  temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpioUqefpinctrl@f1000002qcom,sm8650-tlmm0 Ueqp  Jfphub-i2c0-data-clk-state}gpio64gpio65 i2chub0_se0 2fIhub-i2c1-data-clk-state}gpio66gpio67 i2chub0_se1 2fJhub-i2c2-data-clk-state}gpio68gpio69 i2chub0_se2 2fKhub-i2c3-data-clk-state}gpio70gpio71 i2chub0_se3 2fLhub-i2c4-data-clk-state}gpio72gpio73 i2chub0_se4 2fMhub-i2c5-data-clk-state}gpio74gpio75 i2chub0_se5 2fNhub-i2c6-data-clk-state}gpio76gpio77 i2chub0_se6 2fOhub-i2c7-data-clk-state}gpio78gpio79 i2chub0_se7 2fPhub-i2c8-data-clk-state}gpio206gpio207 i2chub0_se8 2fQhub-i2c9-data-clk-state}gpio80gpio81 i2chub0_se9 2fRpcie0-default-statefqperst-pins}gpio94gpio clkreq-pins}gpio95pcie0_clk_req_n 2wake-pins}gpio96gpio 2pcie1-default-statefuperst-pins}gpio97gpio clkreq-pins}gpio98pcie1_clk_req_n 2wake-pins}gpio99gpio 2qup-i2c0-data-clk-state}gpio32gpio33 qup1_se0 2fUqup-i2c1-data-clk-state}gpio36gpio37 qup1_se1 2fXqup-i2c2-data-clk-state}gpio40gpio41 qup1_se2 2f[qup-i2c3-data-clk-state}gpio44gpio45 qup1_se3 2f^qup-i2c4-data-clk-state}gpio48gpio49 qup1_se4 2faqup-i2c5-data-clk-state}gpio52gpio53 qup1_se5 2fdqup-i2c6-data-clk-state}gpio56gpio57 qup1_se6 2fgqup-i2c7-data-clk-state}gpio60gpio61 qup1_se7 2fjqup-i2c8-data-clk-state }gpio0gpio1 qup2_se0 2f4qup-i2c9-data-clk-state }gpio4gpio5 qup2_se1 2f7qup-i2c10-data-clk-state }gpio8gpio9 qup2_se2 2f:qup-i2c11-data-clk-state}gpio12gpio13 qup2_se3 2f=qup-i2c12-data-clk-state}gpio16gpio17 qup2_se4 2f@qup-i2c13-data-clk-state}gpio20gpio21 qup2_se5 2fCqup-i2c14-data-clk-state}gpio24gpio25 qup2_se6 2qup-spi0-cs-state}gpio35 qup1_se0fWqup-spi0-data-clk-state}gpio32gpio33gpio34 qup1_se0fVqup-spi1-cs-state}gpio39 qup1_se1fZqup-spi1-data-clk-state}gpio36gpio37gpio38 qup1_se1fYqup-spi2-cs-state}gpio43 qup1_se2f]qup-spi2-data-clk-state}gpio40gpio41gpio42 qup1_se2f\qup-spi3-cs-state}gpio47 qup1_se3f`qup-spi3-data-clk-state}gpio44gpio45gpio46 qup1_se3f_qup-spi4-cs-state}gpio51 qup1_se4fcqup-spi4-data-clk-state}gpio48gpio49gpio50 qup1_se4fbqup-spi5-cs-state}gpio55 qup1_se5ffqup-spi5-data-clk-state}gpio52gpio53gpio54 qup1_se5fequp-spi6-cs-state}gpio59 qup1_se6fiqup-spi6-data-clk-state}gpio56gpio57gpio58 qup1_se6fhqup-spi7-cs-state}gpio63 qup1_se7flqup-spi7-data-clk-state}gpio60gpio61gpio62 qup1_se7fkqup-spi8-cs-state}gpio3 qup2_se0f6qup-spi8-data-clk-state}gpio0gpio1gpio2 qup2_se0f5qup-spi9-cs-state}gpio7 qup2_se1f9qup-spi9-data-clk-state}gpio4gpio5gpio6 qup2_se1f8qup-spi10-cs-state}gpio11 qup2_se2f<qup-spi10-data-clk-state}gpio8gpio9gpio10 qup2_se2f;qup-spi11-cs-state}gpio15 qup2_se3f?qup-spi11-data-clk-state}gpio12gpio13gpio14 qup2_se3f>qup-spi12-cs-state}gpio19 qup2_se4fBqup-spi12-data-clk-state}gpio16gpio17gpio18 qup2_se4fAqup-spi13-cs-state}gpio23 qup2_se5fEqup-spi13-data-clk-state}gpio20gpio21gpio22 qup2_se5fDqup-spi14-cs-state}gpio27 qup2_se6qup-spi14-data-clk-state}gpio24gpio25gpio26 qup2_se6qup-uart14-default-state}gpio26gpio27 qup2_se6 2fFqup-uart14-cts-rts-state}gpio24gpio25 qup2_se6 fGqup-uart15-default-state}gpio30gpio31 qup2_se7fHsdc2-sleep-statefclk-pins }sdc2_clkcmd-pins }sdc2_cmd 2data-pins }sdc2_data 2sdc2-default-statefclk-pins }sdc2_clkcmd-pins }sdc2_cmd  2data-pins }sdc2_data  2disp0-reset-n-active-state}gpio133gpiofdisp0-reset-n-suspend-state}gpio133gpio fmdp-vsync-active-state}gpio86 mdp_vsync fmdp-vsync-suspend-state}gpio86 mdp_vsync fspkr-2-sd-n-active-state}gpio77gpiofiommu@15000000/2qcom,sm8650-smmu-500qcom,smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY4f.interrupt-controller@17100000 2arm,gic-v3        fmsi-controller@171400002arm,gic-v3-its  fotimer@174200002arm,armv7-timer-memB  frame@17421000BB  frame@17423000B0    Adisabledframe@17425000BP    Adisabledframe@17427000Bp    Adisabledframe@17429000B    Adisabledframe@1742b000B    Adisabledframe@1742d000B   Adisabledrsc@17a000002qcom,rpmh-rsc@drv-0drv-1drv-2$   $ 0 apps_rscbcm-voter2qcom,bcm-voterfclock-controller2qcom,sm8650-rpmh-clknHxoIfpower-controller2qcom,sm8650-rpmhpdhfopp-table2operating-points-v2fopp-16opp-480fopp-524opp-568fopp-60<opp-64@fopp-80Popp-128fopp-144opp-192fopp-256fzopp-320@opp-336Popp-384opp-416regulators-02qcom,pm8550-rpmh-regulators @ P ` v        bbob1 vreg_bob1 2K (2qcom,sm8650-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink  Npconnector@02usb-c-connector`dualkdualports port@0endpointXfport@1endpointXfsound(2qcom,sm8650-sndcardqcom,sm8450-sndcard ,SM8650-MTP3uSpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTwsa-dai-link WSA Playbackcpuicodecplatformvph-pwr-regulator2regulator-fixed vph_pwr 8u  (8u f interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-path#clock-cellsclock-frequencyphandleclocksclock-multclock-divdevice_typeregpower-domainspower-domain-namesenable-methodnext-level-cachecapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domain#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,client-idqcom,vmidinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusdma-coherentstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesreg-namesinterrupt-namesresetsreset-namesiommu-mapinterrupt-mapinterrupt-map-maskmsi-mapmsi-map-masklinux,pci-domainnum-lanesbus-rangephysphy-nameswake-gpiosperst-gpiosassigned-clocksassigned-clock-ratesclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyvdda-qref-supplyqcom,eeqcom,controlled-remotelyfreq-table-hzrequired-oppslanes-per-directionqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microamp#hwlock-cellsoperating-points-v2qcom,gmumemory-regionopp-hzopp-levelqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-namesfirmware-namelabel#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,ports-sinterval-lowgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbus-widthsdhci-caps-maskqcom,dll-configqcom,ddr-configcd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcpinctrl-1remote-endpointassigned-clock-parentsvdda-supplydata-lanesvddio-supplyvci-supplyvdd-supplyvdds-supplyvdda12-supplysnps,hird-thresholdsnps,usb2-gadget-lpm-disablesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,is-utmi-l1-suspendsnps,usb3_lpm_capablesnps,usb2-lpm-disablesnps,has-lpm-erratumtx-fifo-resizedr_modeusb-role-switchqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelqcom,bus-idbias-pull-upoutput-disablepower-source#pwm-cellsvdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-down#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configvdd-bob1-supplyvdd-bob2-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modesvdd-l1-supplyvdd-l2-supplyvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-l1-l2-supplyvdd-l3-l4-supplyvdd-l5-supplyvdd-l6-supplyvdd-l7-supply#freq-domain-cellsopp-peak-kBpsqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intentsqcom,protection-domainpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisnvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0orientation-gpiospower-roledata-roleaudio-routinglink-namesound-dairegulator-always-onregulator-boot-on