J8@(  *,rockchip,rk3568-odroid-m1rockchip,rk35687Hardkernel ODROID-M1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fe5c0000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fdd40000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fe650000/serial@fdd50000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%9F@Xer@ cpu@100cpu,arm,cortex-a55psci%9F@Xer@ cpu@200cpu,arm,cortex-a55psci%9F@Xer@ cpu@300cpu,arm,cortex-a55psci%9F@Xer@ l3-cache,cache;H@Zopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystem firmwarescmi ,arm,scmi-smc protocol@14#opp-table-1,operating-points-v2Eopp-200000000  opp-300000000 opp-400000000ׄ opp-600000000#F opp-700000000)' opp-800000000/B@hdmi-sound,simple-audio-card0HDMIGi2s`zokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m#xin32k ,fixed-clockxin32kdefault#sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy/ zdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy/zokayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk=host Eutmi_wide/NUzokay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk=host usb2-phyusb3-phy Eutmi_wide/NUzokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  nA(usb@fd800000 ,generic-ehci usbzokayusb@fd840000 ,generic-ohci usbzokayusb@fd880000 ,generic-ehci usbzokayusb@fd8c0000 ,generic-ohci usbzokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdWio-domains&,rockchip,rk3568-pmu-io-voltage-domainzokay (syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru#6clock-controller@fdd20000,rockchip,rk3568-cruxin24m#6C SG hi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk default zokayregulator@1c ,tcs,tcs4525vdd_cpu 50#!regulator-state-mem.pmic@20,rockchip,rk809 "CHh#mclkHdefault#$Ghy!!!!!!!!!regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem.DCDC_REG2vdd_gpu pqFregulator-state-mem.DCDC_REG3vcc_ddrregulator-state-mem DCDC_REG4vdd_npu pqregulator-state-mem.DCDC_REG5vcc_1v8w@w@regulator-state-mem.LDO_REG1vdda0v9_image  Sregulator-state-mem.LDO_REG2 vdda_0v9  regulator-state-mem.LDO_REG3 vdda0v9_pmu  regulator-state-mem " LDO_REG4 vccio_acodec2Z2Zregulator-state-mem.LDO_REG5 vccio_sdw@2Zregulator-state-mem.LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem "2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem.LDO_REG8 vcca1v8_pmuw@w@regulator-state-mem "w@LDO_REG9vcca1v8_imagew@w@Tregulator-state-mem.SWITCH_REG1vcc_3v3regulator-state-mem.SWITCH_REG2 vcc3v3_sd]regulator-state-mem.serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk>%%&defaultCP zdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'defaultZ zdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(defaultZ zdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultZ zdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*defaultZ zdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllere power-domain@7y+epower-domain@8 y,-.epower-domain@9  y/01epower-domain@10 y234567epower-domain@11 y8epower-domain@13 y9epower-domain@14 y:;<epower-domain@15 y=>?@ABCDegpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus%E/zokayFvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclkG/ iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface/ Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkN&$% coreaxiahb/ video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkH/ iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface/ Hmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрNreset zdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refN stmmacethIJ K zdisabledmdio,snps,dwmac-mdio stmmac-axi-config%/?Irx-queues-configOJqueue0tx-queues-configeKqueue0vop@fe040000 0@{vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2L/ zokay,rockchip,rk3568-vopChports port@0 endpoint@2MUport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface/ zokayLdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyN/ apbN zdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyO/ apbN zdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault PQR/ ChzokaySTports port@0endpointUMport@1endpointVqos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi#  Wpcie@fe260000,rockchip,rk3568-pcie0@&{dbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`XXXX +3 pcie-phy/T @@Npipe  zdisabledlegacy-interrupt-controllern HXmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрNresetzokay=G X"adefaultYZ[\ly]mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрNreset zdisabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc^defaultzokay flash@0,jedec,spi-norpartitions,fixed-partitions partition@0SPLpartition@e0000 U-Boot Envpartition@100000U-Boot partition@300000splash0partition@400000 Filesystem@mmc@fe310000,rockchip,rk3568-dwcmshc1 C{}S n6(|zy{}corebusaxiblocktimerzokay= default_`abcyi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4C=ASFqFq?C9mclk_txmclk_rxhclk>dtxNPQ tx-mrx-mhzokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5CEISFqFqGK:mclk_txmclk_rxhclk>ddrxtxNRS tx-mrx-mdefault0efghijklmnophzokayi2s@fe420000,rockchip,rk3568-i2s-tdmB 6CMSFqOO;mclk_txmclk_rxhclk>ddtxrxNTtx-mdefaultqrsth zdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclk>ddtxrxNUV tx-mrx-mh zdisabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclk>d rxuvwxyzdefaultNXpdm-mh zdisabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\>dtxdefault{h zdisableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclk %dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclk di2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk|default  zdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk}default  zdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk~default  zdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkdefault  zdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkdefault  zdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk>%%txrxdefault   zdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk>%%txrxdefault   zdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk>%%txrxdefault   zdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk>%%txrxdefault   zdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk>%%defaultCP zdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk>%%defaultCPzokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk>%%defaultCP zdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk>%% defaultCP zdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk>% % defaultCP zdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk>% % defaultCP zdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk>%%defaultCP zdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk>%%defaultCP zdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk>%%defaultCP zdisabledthermal-zonescpu-thermal !d 7 Etripscpu_alert0 Up apassivecpu_alert1 U$ apassivecpu_crit Us a criticalcooling-mapsmap0 l0 q gpu-thermal ! 7 Etripsgpu-threshold Up apassivegpu-target U$ apassivegpu-crit Us a criticalcooling-mapsmap0 l qtsadc@fe710000,rockchip,rk3568-tsadcq sCSf@ `tsadcapb_pclkN sinitdefaultsleep   zokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkN saradc-apb zokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultZ zdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultZ zdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultZ zdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultZ zdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultZ zdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultZ zdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultZ zdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultZ zdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultZ zdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultZ zdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultZ zdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultZ zdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipeC"SN  # 9zokay Dphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipeC%SN  # 9zokayphy@fe870000,rockchip,rk3568-csi-dphyypclk 9Napb zdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz 9/ apbN zdisabledNmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ 9/ apbN zdisabledOusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  O#zokayhost-port 9zokay Dotg-port 9zokay Dusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  O#zokayhost-port 9zokay Dotg-port 9zokay Dpinctrl,rockchip,rk3568-pinctrlW gpio@fdd60000,rockchip,gpio-bank !.  _ o  {n"gpio@fe740000,rockchip,gpio-bankt "cd _ o  {ngpio@fe750000,rockchip,gpio-banku #ef _ o@  {ngpio@fe760000,rockchip,gpio-bankv $gh _ o`  {ngpio@fe770000,rockchip,gpio-bankw %ij _ o  {npcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-rstnout cemmc-bus8   _emmc-clk `emmc-cmd aemmc-datastrobe beth0eth1flashfspifspi-dual-io-pins@ ^gmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ gmac1gpuhdmitxhdmitxm0-cec Rhdmitx-scl Phdmitx-sda Qi2c0i2c0-xfer   i2c1i2c1-xfer  |i2c2i2c2m0-xfer }i2c3i2c3m0-xfer ~i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx hi2s1m0-lrcktx gi2s1m0-mclk $i2s1m0-sclkrx fi2s1m0-sclktx ei2s1m0-sdi0  ii2s1m0-sdi1  ji2s1m0-sdi2  ki2s1m0-sdi3 li2s1m0-sdo0 mi2s1m0-sdo1 ni2s1m0-sdo2  oi2s1m0-sdo3  pi2s2i2s2m0-lrcktx ri2s2m0-sclktx qi2s2m0-sdi si2s2m0-sdo ti2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk updmm0-clk1 vpdmm0-sdi0  wpdmm0-sdi1  xpdmm0-sdi2  ypdmm0-sdi3 zpmicpmic-int-l #pmupwm0pwm0m0-pins 'pwm1pwm1m0-pins (pwm2pwm2m0-pins )pwm3pwm3-pins *pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Ysdmmc0-clk Zsdmmc0-cmd [sdmmc0-det \sdmmc1sdmmc2spdifspdifm0-tx {spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer &uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ir-receiverir-receiver-pin ledsled-power-pin led-work-pin pciepcie-reset-pin vcc3v3-pcie-en-pin rk809hp-det-pin usbvcc5v0-usb-host-en-pin vcc5v0-usb-dr-en-pin sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^ sata-phy/ zdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy 9&'wrefclk_mrefclk_npclkNphy zokaypcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr` +3 pcie-phy/0@@'T @@@{dbiapbconfigNpipe zdisabledlegacy-interrupt-controllern pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr` + 3 pcie-phy/0@(T @@{dbiapbconfigNpipezokaydefault  legacy-interrupt-controllern ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refN stmmaceth zokayChSsY@ output  rgmii D!default !O *-mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22 3N  C stmmac-axi-config%/?rx-queues-configOqueue0tx-queues-configequeue0phy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipeCSN  # 9zokay Dchosen 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthlabelnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsphy-supplyrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-usstdout-pathfunctioncolordefault-statelinux,default-triggersimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingenable-active-highstartup-delay-us