*8( turing,rk1rockchip,rk3588 +7Turing Machines RK1aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1c0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  cpu@100cpuarm,cortex-a55psci"5 a q~@@ cpu@200cpuarm,cortex-a55psci"5 a q~@@ cpu@300cpuarm,cortex-a55psci"5 a q~@@ cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@500cpuarm,cortex-a76psci"5 a q~@@cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@700cpuarm,cortex-a76psci"5 a q~@@ idle-statespscicpu-sleeparm,idle-state#4Kd\xl l2-cache-l0caches@} l2-cache-l1caches@}l2-cache-l2caches@}l2-cache-l3caches@}l2-cache-b0caches@}l2-cache-b1caches@}l2-cache-b2caches@}l2-cache-b3caches@}l3-cachecaches0@}display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmemgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5 corecoregroupstacks 0\]^ jobmmugpu-  ;disabledopp-tableoperating-points-v2opp-300000000B I L L Popp-400000000Bׄ I L L Popp-500000000Be I L L Popp-600000000B#F I L L Popp-700000000B)' I ` ` Popp-800000000B/ I q q Popp-900000000B5 I 5 5 Popp-1000000000B; I P P Pusb@fc000000rockchip,rk3588-dwc3snps,dwc3@5 ref_clksuspend_clkbus_clkWotg _ dusb2-phyusb3-phy nutmi_wide-wR~ ;disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5!_"dusb- ;disabledusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5!_"dusb- ;disabledusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5#_$dusb- ;disabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5#_$dusb- ;disabledusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr& ref_clksuspend_clkbus_clkutmipipeWhost_% dusb3-phy nutmi_widew4~* ;disablediommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncD ;disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncD ;disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXdsyscon@fd58c000rockchip,rk3588-sys-grfsysconX_syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ `syscon@fd5a6000rockchip,rk3588-vo-grfsysconZ` 5syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ5asyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon[&syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy5 phyclk usb480m_phy0wmQphyapb ;disabledotg-port] ;disabledsyscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5 phyclk usb480m_phy2woQphyapb ;disabled!host-port] ;disabled"syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5 phyclk usb480m_phy3wp Qphyapb ;disabled#host-port] ;disabled$syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р h&i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts  i2cpclku'default+;okayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0dp$(regulator-state-mem/regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0dp$(regulator-state-mem/serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5 baudclkapb_pclkH))Mtxrxu*defaultWa ;disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5  pwmpclku+defaultn;okaypwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5  pwmpclku,defaultn ;disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5  pwmpclku-defaultn ;disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05  pwmpclku.defaultn ;disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfdbpower-controller!rockchip,rk3588-power-controllery+;okaypower-domain@8y+power-domain@9  5!#" /01y+power-domain@10 5!#"2ypower-domain@11 5!#"3ypower-domain@12 54567ypower-domain@13 +ypower-domain@14(58ypower-domain@15 59ypower-domain@165 :;<+ypower-domain@17 5 =>?ypower-domain@215 @ABCDEFG+ypower-domain@235CAHypower-domain@14 58ypower-domain@1559ypower-domain@225Iypower-domain@245[Z]JK+ypower-domain@2585ZLypower-domain@2685QMNypower-domain@2705OPQR+ypower-domain@28 5STypower-domain@29(5UVypower-domain@305z{Wypower-domain@31@5WXYZ[ypower-domain@33!5WZ[ypower-domain@34"5WZ[ypower-domain@37%52\ypower-domain@38&545ypower-domain@40(]yvideo-codec@fdc70000rockchip,rk3588-av1-vpulvdpu<ACLׄׄ5AC  aclkhclk- wvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7 aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop^-h_`ab ;disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\  aclkifaceD- ;disabled^i2s@fddc0000rockchip,rk3588-i2s-tdm5 mclk_txmclk_rxhclk<HcMtx-wQtx-m ;disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5445 mclk_txmclk_rxhclk<1HcMtx-wQtx-m ;disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500, mclk_txmclk_rxhclk<-HcMrx-wQrx-m ;disabledqos@fdf35000rockchip,rk3588-qossysconP 4qos@fdf35200rockchip,rk3588-qossysconR 5qos@fdf35400rockchip,rk3588-qossysconT 6qos@fdf35600rockchip,rk3588-qossysconV 7qos@fdf36000rockchip,rk3588-qossyscon` Wqos@fdf39000rockchip,rk3588-qossyscon \qos@fdf3d800rockchip,rk3588-qossyscon ]qos@fdf3e000rockchip,rk3588-qossyscon Yqos@fdf3e200rockchip,rk3588-qossyscon Xqos@fdf3e400rockchip,rk3588-qossyscon Zqos@fdf3e600rockchip,rk3588-qossyscon [qos@fdf40000rockchip,rk3588-qossyscon Uqos@fdf40200rockchip,rk3588-qossyscon Vqos@fdf40400rockchip,rk3588-qossyscon Oqos@fdf40500rockchip,rk3588-qossyscon Pqos@fdf40600rockchip,rk3588-qossyscon Qqos@fdf40800rockchip,rk3588-qossyscon Rqos@fdf41000rockchip,rk3588-qossyscon Sqos@fdf41100rockchip,rk3588-qossyscon Tqos@fdf60000rockchip,rk3588-qossyscon :qos@fdf60200rockchip,rk3588-qossyscon ;qos@fdf60400rockchip,rk3588-qossyscon <qos@fdf61000rockchip,rk3588-qossyscon =qos@fdf61200rockchip,rk3588-qossyscon >qos@fdf61400rockchip,rk3588-qossyscon ?qos@fdf62000rockchip,rk3588-qossyscon 8qos@fdf63000rockchip,rk3588-qossyscon0 9qos@fdf64000rockchip,rk3588-qossyscon@ Hqos@fdf66000rockchip,rk3588-qossyscon` @qos@fdf66200rockchip,rk3588-qossysconb Aqos@fdf66400rockchip,rk3588-qossyscond Bqos@fdf66600rockchip,rk3588-qossysconf Cqos@fdf66800rockchip,rk3588-qossysconh Dqos@fdf66a00rockchip,rk3588-qossysconj Eqos@fdf66c00rockchip,rk3588-qossysconl Fqos@fdf66e00rockchip,rk3588-qossysconn Gqos@fdf67000rockchip,rk3588-qossysconp Iqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 2qos@fdf71000rockchip,rk3588-qossyscon 3qos@fdf72000rockchip,rk3588-qossyscon /qos@fdf72200rockchip,rk3588-qossyscon" 0qos@fdf72400rockchip,rk3588-qossyscon$ 1qos@fdf80000rockchip,rk3588-qossyscon Lqos@fdf81000rockchip,rk3588-qossyscon Mqos@fdf81200rockchip,rk3588-qossyscon Nqos@fdf82000rockchip,rk3588-qossyscon Jqos@fdf82200rockchip,rk3588-qossyscon" Kdfi@fe060000rockchip,rk3588-dfi@&0:dpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`*eeee8IX0f0`_% dpcie-phy-"T @ @0 @@dbiapbconfigw). Qpwrpipe+;okaydefaultug jhlegacy-interrupt-controllerv epcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`*iiii8IX@f@`_j dpcie-phy-"T @ @0 A@dbiapbconfigw*/ Qpwrpipe+ ;disabledlegacy-interrupt-controllerv iethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567Y^50 stmmacethclk_mac_refpclk_macaclk_macptp_ref-!w$ Qstmmacethh_&klm;okayoutputn rgmii-rxiduopqrsdefault Cmdiosnps,dwmac-mdio+ethernet-phy@14ethernet-phy-id001c.c916ethernet-phy-ieee802.3-c22defaultut:/P junstmmac-axi-configAK[krx-queues-configklqueue0queue1tx-queues-configmqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo satapmaliverxoobrefasic+ ;disabledsata-port@0@_j dsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq satapmaliverxoobrefasic+ ;disabledsata-port@0@_% dsata-phy  spi@fe2b0000 rockchip,sfc+@5/0 clk_sfchclk_sfc+ ;disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5   biuciuciu-driveciu-sample defaultuvwxy-( ;disabledmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5 biuciuciu-driveciu-sample defaultuz-% ;disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-. corebusaxiblocktimer u{|}~default(wQcorebusaxiblocktimer;okay"i2s@fe470000rockchip,rk3588-i2s-tdmG5+/( mclk_txmclk_rxhclk<)-H))Mtxrx-&w*+ Qtx-mrx-m<default(u ;disabledi2s@fe480000rockchip,rk3588-i2s-tdmH5y}u mclk_txmclk_rxhclkH))Mtxrxw^_ Qtx-mrx-m<default(u ;disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5 i2s_clki2s_hclk<HMtxrx-&defaultu ;disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5% i2s_clki2s_hclk<"HMtxrx-&defaultu ;disabledinterrupt-controller@fe600000 arm,gic-v3 `h vWaa8l+msi-controller@fe640000arm,gic-v3-itsdl{fmsi-controller@fe660000arm,gic-v3-itsfl{ppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell@ VW5n  apb_pclk)dma-controller@fea30000arm,pl330arm,primecell@ XY5o  apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{  i2cpclk>udefault+;okayregulator@42rockchip,rk8602B vdd_npu_s0dp~$(regulator-state-mem/i2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5|  i2cpclk?udefault+ ;disabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5}  i2cpclk@udefault+ ;disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~  i2cpclkAudefault+ ;disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkBudefault+ ;disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW  pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc  tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5 spiclkapb_pclkH))Mtxrx udefault+ ;disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5 spiclkapb_pclkH))Mtxrx udefault+ ;disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5 spiclkapb_pclkHMtxrxudefault+;okaypmic@0rockchip,rk806B@ defaultu((((( ( ( ( *( 6( C P( ] j w(  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1dp~0 vdd_gpu_s0 regulator-state-mem/dcdc-reg2dp~0vdd_cpu_lit_s0 regulator-state-mem/dcdc-reg3 L q0 vdd_log_s0regulator-state-mem/ qdcdc-reg4dp~0 vdd_vdenc_s0regulator-state-mem/dcdc-reg5 L 0 vdd_ddr_s0regulator-state-mem/ Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg70vdd_2v0_pldo_s3regulator-state-mem  dcdc-reg82Z2Z vcc_3v3_s3regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem/dcdc-reg10w@w@ vcc_1v8_s3regulator-state-mem  w@pldo-reg1w@w@ avcc_1v8_s0regulator-state-mem/pldo-reg2w@w@ vcc_1v8_s0regulator-state-mem/ w@pldo-reg3OO avdd_1v2_s0regulator-state-mem/pldo-reg42Z2Z0 vcc_3v3_s0regulator-state-mem/pldo-reg5w@2Z0 vccio_sd_s0regulator-state-mem/pldo-reg6w@w@ pldo6_s3regulator-state-mem  w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem  qnldo-reg2 P Pvdd_ddr_pll_s0regulator-state-mem/ Pnldo-reg3 q q avdd_0v75_s0regulator-state-mem/nldo-reg4 P P vdd_0v85_s0regulator-state-mem/nldo-reg5 q q vdd_0v75_s0regulator-state-mem/spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5 spiclkapb_pclkHMtxrx udefault+ ;disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5 baudclkapb_pclkH)) MtxrxudefaultaW ;disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5 baudclkapb_pclkH) ) MtxrxudefaultaW;okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5 baudclkapb_pclkH) ) MtxrxudefaultaW ;disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5 baudclkapb_pclkH MtxrxudefaultaW ;disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5 baudclkapb_pclkH MtxrxudefaultaW ;disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5 baudclkapb_pclkH MtxrxudefaultaW ;disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5 baudclkapb_pclkHccMtxrxudefaultaW ;disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5 baudclkapb_pclkHc c MtxrxudefaultaW ;disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5 baudclkapb_pclkHc c MtxrxudefaultaW;okaypwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK  pwmpclkudefaultn ;disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK  pwmpclkudefaultn ;disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK  pwmpclkudefaultn ;disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK  pwmpclkudefaultn ;disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON  pwmpclkudefaultn ;disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON  pwmpclkudefaultn ;disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON  pwmpclkudefaultn ;disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON  pwmpclkudefaultn ;disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ  pwmpclkudefaultn ;disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ  pwmpclkudefaultn ;disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ  pwmpclkudefaultn ;disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ  pwmpclkudefaultn ;disabledtsadc@fec00000rockchip,rk3588-tsadc5 tsadcapb_pclk<LwVWQtsadc-apbtsadc   +u F gpiootpout P ;disabledadc@fec10000rockchip,rk3588-saradc f5 saradcapb_pclkwU Qsaradc-apb ;disabledi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkCudefault+;okayrtc@51haoyu,hym8563Qhym8563defaultu  xi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkDudefault+ ;disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkEudefault+ ;disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5 spiclkapb_pclkHc cMtxrx udefault+ ;disabledefuse@fecc0000rockchip,rk3588-otp 5 otpapb_pclkphyarbw Qotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p  apb_pclkcphy@fed60000rockchip,rk3588-hdptx-phy 5T refapb]8w#cde!""Qphyapbinitcmnlaneroplllcpllh ;disabledphy@fed80000rockchip,rk3588-usbdp-phy]5lV refclkimmortalpclkutmi(w   Qinitcmnlanepcs_apbpma_apb     ;disabled phy@fee00000rockchip,rk3588-naneng-combphy5vW  refapbpipe<L]w<CQphyapb &  ;disabledjphy@fee20000rockchip,rk3588-naneng-combphy5xW  refapbpipe<L]w>EQphyapb & ;okay%sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrlh+gpio@fd8a0000rockchip,gpio-bank5qr  v gpio@fec20000rockchip,gpio-bank5st  v gpio@fec30000rockchip,gpio-bank5uv  @ v gpio@fec40000rockchip,gpio-bank5wx  ` v ugpio@fec50000rockchip,gpio-bank5yz  v hpcfg-pull-up pcfg-pull-down pcfg-pull-none %pcfg-pull-none-drv-level-2 % 2pcfg-pull-up-drv-level-1  2pcfg-pull-up-drv-level-2  2pcfg-pull-none-smt % Aauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout V{emmc-bus8 V|emmc-clk V}emmc-cmd V~emmc-data-strobe Veth1fspigmac1gmac1-miim Vogmac1-rx-bus20 V qgmac1-tx-bus20 V   pgmac1-rgmii-clk Vrgmac1-rgmii-bus@ Vsgpuhdmii2c0i2c0m2-xfer V'i2c1i2c1m2-xfer V  i2c2i2c2m0-xfer V  i2c3i2c3m0-xfer V  i2c4i2c4m0-xfer V  i2c5i2c5m0-xfer V  i2c6i2c6m0-xfer V  i2c7i2c7m0-xfer V  i2c8i2c8m0-xfer V  i2s0i2s0-lrck Vi2s0-sclk Vi2s0-sdi0 Vi2s0-sdi1 Vi2s0-sdi2 Vi2s0-sdi3 Vi2s0-sdo0 Vi2s0-sdo1 Vi2s0-sdo2 Vi2s0-sdo3 Vi2s1i2s1m0-lrck Vi2s1m0-sclk Vi2s1m0-sdi0 Vi2s1m0-sdi1 Vi2s1m0-sdi2 Vi2s1m0-sdi3 Vi2s1m0-sdo0 V i2s1m0-sdo1 V i2s1m0-sdo2 V i2s1m0-sdo3 V i2s2i2s2m1-lrck Vi2s2m1-sclk V i2s2m1-sdi V i2s2m1-sdo V i2s3i2s3-lrck Vi2s3-sclk Vi2s3-sdi Vi2s3-sdo Vjtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp Vpmupwm0pwm0m0-pins V+pwm0m2-pins V pwm1pwm1m0-pins V,pwm2pwm2m0-pins V-pwm3pwm3m0-pins V.pwm4pwm4m0-pins V pwm5pwm5m0-pins V pwm6pwm6m0-pins V pwm7pwm7m0-pins V pwm8pwm8m0-pins V pwm9pwm9m0-pins V pwm10pwm10m0-pins V pwm11pwm11m0-pins V pwm12pwm12m0-pins V pwm13pwm13m0-pins V pwm14pwm14m0-pins V pwm15pwm15m0-pins V refclksatasata0sata1sata2sdiosdiom1-pins` Vzsdmmcsdmmc-bus4@ Vysdmmc-clk Vvsdmmc-cmd Vwsdmmc-det Vxspdif0spdif1spi0spi0m0-pins0 Vspi0m0-cs0 Vspi0m0-cs1 Vspi1spi1m1-pins0 Vspi1m1-cs0 Vspi1m1-cs1 Vspi2spi2m2-pins0 V spi2m2-cs0 V spi3spi3m1-pins0 V spi3m1-cs0 Vspi3m1-cs1 Vspi4spi4m0-pins0 Vspi4m0-cs0 Vspi4m0-cs1 Vtsadctsadc-shut Vuart0uart0m1-xfer V *uart1uart1m1-xfer V  uart2uart2m0-xfer V uart3uart3m1-xfer V  uart4uart4m1-xfer V  uart5uart5m1-xfer V  uart6uart6m1-xfer V  uart7uart7m1-xfer V  uart8uart8m1-xfer V  uart9uart9m0-xfer V  vopbt656gpio-functsadc-gpio-func Veth0gmac0fanfan-int Vhym8563hym8563-int Vpcie2pcie2-reset Vgpcie3pcie3-reset Vpcie3-reg Vrtl8211frtl8211f-rst Vtusb@fc400000rockchip,rk3588-dwc3snps,dwc3@@5 ref_clksuspend_clkbus_clkWotg _dusb2-phyusb3-phy nutmi_wide-wS~ ;disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+usb2phy@4000rockchip,rk3588-usb2phy@5 phyclk usb480m_phy1wnQphyapb ;disabledotg-port] ;disabledi2s@fddc8000rockchip,rk3588-i2s-tdm܀5 mclk_txmclk_rxhclk<HcMtx-wQtx-m ;disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@599? mclk_txmclk_rxhclk<6HcMtx-wQtx-m ;disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5++' mclk_txmclk_rxhclk<(HcMrx-wQrx-m ;disabledi2s@fde00000rockchip,rk3588-i2s-tdm5&&" mclk_txmclk_rxhclk<#HcMrx-wQrx-m ;disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+05@E;JOt) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`*8IX`_ dpcie-phy-"T @ @0 @@dbiapbconfigw&+ Qpwrpipe;okaydefaultu jh dlegacy-interrupt-controllerv pcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+05AF<KPu) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`*8IX`_ dpcie-phy-"T @ @@0 @@@dbiapbconfigw', Qpwrpipe ;disabledlegacy-interrupt-controllerv pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /05BG=LQ) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`*8IX f `_ dpcie-phy-"T @ @0 @@dbiapbconfigw(- Qpwrpipe+ ;disabledlegacy-interrupt-controllerv ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567X]40 stmmacethclk_mac_refpclk_macaclk_macptp_ref-!w# Qstmmacethh_& ;disabledmdiosnps,dwmac-mdio+stmmac-axi-configAK[rx-queues-configkqueue0queue1tx-queues-configqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5c`fUp satapmaliverxoobrefasic+ ;disabledsata-port@0@_ dsata-phy  phy@fed90000rockchip,rk3588-usbdp-phy]5mW refclkimmortalpclkutmi(wQinitcmnlanepcs_apbpma_apb     ;disabledphy@fee10000rockchip,rk3588-naneng-combphy5wW  refapbpipe<L]w=DQphyapb &  ;disabledphy@fee80000rockchip,rk3588-pcie3-phy]5y pclkwHQphy & t;okaypwm-fanpwm-fan _ (defaultu  Pvcc3v3-pcie30-regulatorregulator-fixedvcc3v3_pcie302Z2Z  pdefaultu vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@(vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3$(chosen serial9:115200n8 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namesoperating-points-v2power-domainsstatusopp-hzopp-microvoltdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthno-sdiono-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellswakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyrockchip,phy-grfcooling-levelsfan-supplypwmsenable-active-highstartup-delay-usstdout-path