8T( !indiedroid,novarockchip,rk3588s +7Indiedroid Novaaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  cpu@100cpuarm,cortex-a55psci"5 a q~@@ cpu@200cpuarm,cortex-a55psci"5 a q~@@ cpu@300cpuarm,cortex-a55psci"5 a q~@@ cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@500cpuarm,cortex-a76psci"5 a q~@@cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@700cpuarm,cortex-a76psci"5 a q~@@ idle-statespscicpu-sleeparm,idle-state#4Kd\xl l2-cache-l0caches@} l2-cache-l1caches@}l2-cache-l2caches@}l2-cache-l3caches@}l2-cache-b0caches@}l2-cache-b1caches@}l2-cache-b2caches@}l2-cache-b3caches@}l3-cachecaches0@}display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmemgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5 corecoregroupstacks 0\]^ jobmmugpu-  ;disabledopp-tableoperating-points-v2opp-300000000B I L L Popp-400000000Bׄ I L L Popp-500000000Be I L L Popp-600000000B#F I L L Popp-700000000B)' I ` ` Popp-800000000B/ I q q Popp-900000000B5 I 5 5 Popp-1000000000B; I P P Pusb@fc000000rockchip,rk3588-dwc3snps,dwc3@5 ref_clksuspend_clkbus_clkWotg _ dusb2-phyusb3-phy nutmi_wide-wR~;okay*portendpoint:!usb@fc800000"rockchip,rk3588-ehcigeneric-ehci5"_#dusb-;okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5"_#dusb-;okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5$_%dusb-;okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5$_%dusb-;okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr& ref_clksuspend_clkbus_clkutmipipeWhost_& dusb3-phy nutmi_widew4~J;okayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncd ;disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncd ;disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXfsyscon@fd58c000rockchip,rk3588-sys-grfsysconXasyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ bsyscon@fd5a6000rockchip,rk3588-vo-grfsysconZ` 5syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ5csyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon[(syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy5 phyclk usb480m_phy0wmqphyapb;okayotg-port};okaysyscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5 phyclk usb480m_phy2woqphyapb;okay"host-port};okay'#syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5 phyclk usb480m_phy3wp qphyapb;okay$host-port};okay'%syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р (i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts  i2cpclk)default+;okayregulator@42rockchip,rk8602Bdpvdd_cpu_big0_s02O*regulator-state-memZregulator@43 rockchip,rk8603rockchip,rk8602Cdpvdd_cpu_big1_s02O*regulator-state-memZserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5 baudclkapb_pclks++xtxrx,default ;disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5  pwmpclk-default ;disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5  pwmpclk.default ;disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5  pwmpclk/default ;disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05  pwmpclk0default ;disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfddpower-controller!rockchip,rk3588-power-controller+;okaypower-domain@8+power-domain@9  5!#" 123+power-domain@10 5!#"4power-domain@11 5!#"5power-domain@12 56789power-domain@13 +power-domain@14(5:power-domain@15 5;power-domain@165 <=>+power-domain@17 5 ?@Apower-domain@215 BCDEFGHI+power-domain@235CAJpower-domain@14 5:power-domain@155;power-domain@225Kpower-domain@245[Z]LM+power-domain@2585ZNpower-domain@2685QOPpower-domain@2705QRST+power-domain@28 5UVpower-domain@29(5WXpower-domain@305z{Ypower-domain@31@5WZ[\]power-domain@33!5WZ[power-domain@34"5WZ[power-domain@37%52^power-domain@38&545power-domain@40(_video-codec@fdc70000rockchip,rk3588-av1-vpulvdpu<ACLׄׄ5AC  aclkhclk- wvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7 aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop`-abcd ;disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\  aclkifaced- ;disabled`i2s@fddc0000rockchip,rk3588-i2s-tdm5 mclk_txmclk_rxhclk<sextx-wqtx-m ;disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5445 mclk_txmclk_rxhclk<1sextx-wqtx-m ;disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500, mclk_txmclk_rxhclk<-sexrx-wqrx-m ;disabledqos@fdf35000rockchip,rk3588-qossysconP 6qos@fdf35200rockchip,rk3588-qossysconR 7qos@fdf35400rockchip,rk3588-qossysconT 8qos@fdf35600rockchip,rk3588-qossysconV 9qos@fdf36000rockchip,rk3588-qossyscon` Yqos@fdf39000rockchip,rk3588-qossyscon ^qos@fdf3d800rockchip,rk3588-qossyscon _qos@fdf3e000rockchip,rk3588-qossyscon [qos@fdf3e200rockchip,rk3588-qossyscon Zqos@fdf3e400rockchip,rk3588-qossyscon \qos@fdf3e600rockchip,rk3588-qossyscon ]qos@fdf40000rockchip,rk3588-qossyscon Wqos@fdf40200rockchip,rk3588-qossyscon Xqos@fdf40400rockchip,rk3588-qossyscon Qqos@fdf40500rockchip,rk3588-qossyscon Rqos@fdf40600rockchip,rk3588-qossyscon Sqos@fdf40800rockchip,rk3588-qossyscon Tqos@fdf41000rockchip,rk3588-qossyscon Uqos@fdf41100rockchip,rk3588-qossyscon Vqos@fdf60000rockchip,rk3588-qossyscon <qos@fdf60200rockchip,rk3588-qossyscon =qos@fdf60400rockchip,rk3588-qossyscon >qos@fdf61000rockchip,rk3588-qossyscon ?qos@fdf61200rockchip,rk3588-qossyscon @qos@fdf61400rockchip,rk3588-qossyscon Aqos@fdf62000rockchip,rk3588-qossyscon :qos@fdf63000rockchip,rk3588-qossyscon0 ;qos@fdf64000rockchip,rk3588-qossyscon@ Jqos@fdf66000rockchip,rk3588-qossyscon` Bqos@fdf66200rockchip,rk3588-qossysconb Cqos@fdf66400rockchip,rk3588-qossyscond Dqos@fdf66600rockchip,rk3588-qossysconf Eqos@fdf66800rockchip,rk3588-qossysconh Fqos@fdf66a00rockchip,rk3588-qossysconj Gqos@fdf66c00rockchip,rk3588-qossysconl Hqos@fdf66e00rockchip,rk3588-qossysconn Iqos@fdf67000rockchip,rk3588-qossysconp Kqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 4qos@fdf71000rockchip,rk3588-qossyscon 5qos@fdf72000rockchip,rk3588-qossyscon 1qos@fdf72200rockchip,rk3588-qossyscon" 2qos@fdf72400rockchip,rk3588-qossyscon$ 3qos@fdf80000rockchip,rk3588-qossyscon Nqos@fdf81000rockchip,rk3588-qossyscon Oqos@fdf81200rockchip,rk3588-qossyscon Pqos@fdf82000rockchip,rk3588-qossyscon Lqos@fdf82200rockchip,rk3588-qossyscon" Mdfi@fe060000rockchip,rk3588-dfi@&0:fpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie'0?05CH>MR) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr1B`Uggggct0h0_& dpcie-phy-"T @ @0 @@dbiapbconfigw). qpwrpipe+ ;disabledlegacy-interrupt-controller1 gpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie'@O05DI?NSs) aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr1B`Uiiiict@h@_j dpcie-phy-"T @ @0 A@dbiapbconfigw*/ qpwrpipe+;okaykdefaultlegacy-interrupt-controller1 iethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567Y^50 stmmacethclk_mac_refpclk_macaclk_macptp_ref-!w$ qstmmacetha(lmn ;disabledmdiosnps,dwmac-mdio+stmmac-axi-config %lrx-queues-config5mqueue0queue1tx-queues-configKnqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo satapmaliverxoobrefasica+ ;disabledsata-port@0s@_j dsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq satapmaliverxoobrefasica+ ;disabledsata-port@0s@_& dsata-phy  spi@fe2b0000 rockchip,sfc+@5/0 clk_sfchclk_sfc+ ;disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5   biuciuciu-driveciu-sample defaultopqr-(;okay stmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5 biuciuciu-driveciu-sampledefaultu-%;okay%2HvSY swmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-. corebusaxiblocktimer xyz{|default(wqcorebusaxiblocktimer;okaygSY }wi2s@fe470000rockchip,rk3588-i2s-tdmG5+/( mclk_txmclk_rxhclk<)-s++xtxrx-&w*+ qtx-mrx-mtdefault~;okayportendpointi2s:i2s@fe480000rockchip,rk3588-i2s-tdmH5y}u mclk_txmclk_rxhclks++xtxrxw^_ qtx-mrx-mtdefault( ;disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5 i2s_clki2s_hclk<sxtxrx-&default ;disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5% i2s_clki2s_hclk<"sxtxrx-&default ;disabledinterrupt-controller@fe600000 arm,gic-v3 `h a81+msi-controller@fe640000arm,gic-v3-itsdhmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell@ VW5n  apb_pclk+dma-controller@fea30000arm,pl330arm,primecell@ XY5o  apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{  i2cpclk>default+ ;disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5|  i2cpclk?default+;okayregulator@42rockchip,rk8602B~dp vdd_npu_s02O*regulator-state-memZi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5}  i2cpclk@default+ ;disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~  i2cpclkAdefault+ ;disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkBdefault+ ;disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW  pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc  tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5 spiclkapb_pclks++xtxrx default+ ;disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5 spiclkapb_pclks++xtxrx default+ ;disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5 spiclkapb_pclksxtxrxdefault+;okay<L pmic@0rockchip,rk806   default B@ 1* =* I* U* a* m* y* * * *  *   *dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1 ~dp vdd_gpu_s00regulator-state-memZdcdc-reg2~dp0vdd_cpu_lit_s0 regulator-state-memZdcdc-reg3 q L vdd_logic_s00regulator-state-mem  , qdcdc-reg4~dp vdd_vdenc_s00regulator-state-memZdcdc-reg5 q P0 vdd_ddr_s0regulator-state-memZ , Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vdd_2v0_pldo_s3regulator-state-mem  ,dcdc-reg82Z2Z vcc_3v3_s3sregulator-state-mem  ,2Zdcdc-reg9 ' ' vddq_ddr_s0regulator-state-memZdcdc-reg10w@w@ vcc_1v8_s3wregulator-state-mem  ,w@pldo-reg1w@w@ vcc_1v8_s0regulator-state-memZpldo-reg2w@w@ vcca_1v8_s0regulator-state-memZ ,w@pldo-reg3OO vdda_1v2_s0regulator-state-memZpldo-reg42Z2Z vcca_3v3_s0regulator-state-memZpldo-reg52Zw@ vccio_sd_s0tregulator-state-memZpldo-reg6w@w@vcc_1v8_s3_pldo6regulator-state-mem  ,w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem  , qnldo-reg2 P Pvdda_ddr_pll_s0regulator-state-memZ , Pnldo-reg3 q q avdd_0v75_s0regulator-state-memZnldo-reg4 P P vdda_0v85_s0regulator-state-memZnldo-reg5spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5 spiclkapb_pclksxtxrx default+ ;disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5 baudclkapb_pclks++ xtxrxdefault ;disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5 baudclkapb_pclks+ + xtxrxdefault;okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5 baudclkapb_pclks+ + xtxrxdefault ;disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5 baudclkapb_pclks xtxrxdefault ;disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5 baudclkapb_pclks xtxrxdefault ;disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5 baudclkapb_pclks xtxrxdefault ;disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5 baudclkapb_pclkseextxrxdefault ;disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5 baudclkapb_pclkse e xtxrxdefault ;disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5 baudclkapb_pclk default;okay Hbluetooth*realtek,rtl8821cs-btrealtek,rtl8723bs-bt X j w defaultpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK  pwmpclkdefault ;disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK  pwmpclkdefault ;disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK  pwmpclkdefault ;disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK  pwmpclkdefault ;disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON  pwmpclkdefault ;disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON  pwmpclkdefault ;disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON  pwmpclkdefault ;disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON  pwmpclkdefault ;disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ  pwmpclkdefault ;disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ  pwmpclkdefault ;disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ  pwmpclkdefault ;disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ  pwmpclkdefault ;disabledtsadc@fec00000rockchip,rk3588-tsadc5 tsadcapb_pclk<LwVWqtsadc-apbtsadc     gpiootpout ;okayadc@fec10000rockchip,rk3588-saradc 5 saradcapb_pclkwU qsaradc-apb;okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkCdefault+;okaytypec-portc@22 fcs,fusb302" default connectorusb-c-connector dual $USB-C *dual 5sink D, Pd ZB@ports+port@0endpoint:port@1endpoint:!port@2endpoint:rtc@51haoyu,hym8563Qhym8563 default li2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkDdefault+;okayaudio-codec@11everest,es8388L<1 zs mclk51 w s wportendpoint:i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5  i2cpclkEdefault+ ;disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5 spiclkapb_pclkse extxrx default+ ;disabledefuse@fecc0000rockchip,rk3588-otp 5 otpapb_pclkphyarbw qotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p  apb_pclkephy@fed60000rockchip,rk3588-hdptx-phy 5T refapb}8w#cde!""qphyapbinitcmnlaneroplllcpll ;disabledphy@fed80000rockchip,rk3588-usbdp-phy}5lV refclkimmortalpclkutmi(w   qinitcmnlanepcs_apbpma_apb    ;okay     ) port+endpoint@0:endpoint@1:phy@fee00000rockchip,rk3588-naneng-combphy5vW  refapbpipe<L}w<Cqphyapb >( P;okayjphy@fee20000rockchip,rk3588-naneng-combphy5xW  refapbpipe<L}w>Eqphyapb >( P;okay&sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl+gpio@fd8a0000rockchip,gpio-bank5qr  f  1: rHEADER_12_1v8HEADER_24_1v8gpio@fec20000rockchip,gpio-bank5st  f  1 rHEADER_27_3v3HEADER_29_1v8HEADER_7_1v8HEADER_31_1v8HEADER_33_1v8HEADER_11_1v8HEADER_13_1v8HEADER_28_3v3HEADER_5_3v3HEADER_3_3v3gpio@fec30000rockchip,gpio-bank5uv  f@  1gpio@fec40000rockchip,gpio-bank5wx  f`  1 rHEADER_16_1v8HEADER_18_1v8HEADER_19_1v8HEADER_21_1v8HEADER_23_1v8HEADER_26_1v8HEADER_15_1v8HEADER_22_1v8gpio@fec50000rockchip,gpio-bank5yz  f  1 rHEADER_37_3v3HEADER_8_3v3HEADER_10_3v3HEADER_32_3v3HEADER_35_3v3HEADER_40_3v3HEADER_38_3v3HEADER_36_3v3pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout xemmc-bus8 yemmc-clk zemmc-cmd {emmc-data-strobe |eth1fspigmac1gpuhdmii2c0i2c0m2-xfer )i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m3-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck ~i2s0-mclk i2s0-sclk i2s0-sdi0 i2s0-sdo0 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins -pwm1pwm1m0-pins .pwm2pwm2m0-pins /pwm3pwm3m0-pins 0pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` usdmmcsdmmc-bus4@ rsdmmc-clk osdmmc-cmd psdmmc-det qspdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut uart0uart0m1-xfer  ,uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m2-xfer   uart9m2-ctsn  uart9m2-rtsn  vopbt656gpio-functsadc-gpio-func bluetooth-pinsbt-reset bt-wake-dev bt-wake-host ethernet-pinsrtl8111-perstb khym8563hym8563-int sdio-pwrseqwifi-enable-h usb-typecusbc0-int typec5v-pwren adc-keys-0 adc-keys buttons  w@ dbutton-boot $boot " -FPadc-keys-1 adc-keys buttons  w@ dbutton-recovery $recovery " -FPchosen Gserial2:1500000n8sdio-pwrseqmmc-pwrseq-simple  ext_clock5default S jvsoundaudio-graph-card $rockchip,es8388-codec) vMicrophoneMic JackHeadphoneHeadphones3 ~LINPUT2Mic JackHeadphonesLOUT1HeadphonesROUT1 vbus5v0-typec-regulatorregulator-fixed  defaultvbus5v0_typecLK@LK@O'vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3O*vcc-3v3-s0-regulatorregulator-fixed2Z2Z vcc_3v3_s0Os}regulator-state-memZvcc5v0-sys-regulatorregulator-fixedLK@LK@ vcc5v0_sys*vcc5v0-usb-regulatorregulator-fixedLK@LK@ vcc5v0_usbO'vcc5v0-usbdcin-regulatorregulator-fixedLK@LK@vcc5v0_usbdcin compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namesoperating-points-v2power-domainsstatusopp-hzopp-microvoltdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayfcs,suspend-voltage-selectorvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removableno-mmc-hs400rockchip,trcm-sync-tx-onlydai-formatmclk-fsmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiosrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelpower-roletry-power-rolesource-pdossink-pdosop-sink-microwattwakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grforientation-switchmode-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsio-channel-namesio-channelskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathpost-power-on-delay-msreset-gpioswidgetsroutingdaisenable-active-highgpio